Archive for the ‘Zynq’ Category

A Supercomputer for only $100 – The Kickstart project Parallella

October 26, 2012

Check out Kickstarter project Parallella

Parallella, a personal supercomputer, is using Zynq 7010 FPGA SoC as the host, and Epiphany 16- or 64-core Microprocessor as the accelerator.
Adapteva, owner of the Epiphany technology, already has a SDK, and OpenCL SDK (beta). Parallella would be very useful for embedded vision, SDR, HPC and many other computation intensive projects.

The following diagram shows Parallella specification.

The Kickstarter goal is $750,000, and it ends on 2012-10-27. At the time of writing this post (2012-10-25, 23:33 MDT), there are 3,325 backers, and $578,542 pledged.
I pledged $99, and if you’re interested, please do the same. There are less than 2 days left to make it a success.

I got ZED board

September 5, 2012

I got the ZED board I ordered 3 months ago today.

So far so good, hope I can find time doing some interesting projects with ZED and KC705.


The following command is used to turn on LED LD0:
echo 1 > /sys/class/gpio/gpio61/value

You can order ZedBoard now

June 1, 2012

ZedBoard web site is up with real content, and you can order the board from today, scheduled to ship in July.
Two versions of ZedBoard are offered (not sure if there are any hardware difference):

  • Avnet commercial version $395
  • Digilent academic edition $299 (university affiliation is required)


Vivado – new Xilinx design tool

April 25, 2012

Xilinx announced Vivado today.
Looks like ISE goes up to version 13.4, and Vivado supports only 7-series FPGAs.

Here’s some more details from EDA 360 Xilinx Vivado Design Suite brings SoC design style to advanced-node FPGA development

I am told, Vivado will be available to the public on May 8th, two weeks away.

Xilinx makes ISE 14.1 available today (May 8).
Kind of confusing, names of ISE 14.1 (Rodin) vs Vivado.

Zynq EPP

April 10, 2012

I went to annual Xilinx Technical Seminar today on Xilinx campus.

This year’s topic is all about Zynq. Here’s what I knew from the seminar.

ISE 14.1 will be out in about 2 weeks, it will bundle Rodin (currently in Beta 4). Rodin significantly reduces build time (ISE 13.2/13 hours vs Beta 2/5 hours), and memory used (16G vs 9G ) in the example for XC7V2000T device.

The video demo was performed on a ZC702 board. The FPGA hardware was built with AutoESL, the high-level synthesis tool, based on C code. The hardware accelerated edge detection is playable, and much smoother than software only edge detection.

Some Zynq boards, including ZED, are listed from Boards and Kits section from Xilinx website:

I was told ZC702 should be available to order in summer.

Some Zynq related Announcements

March 28, 2012

There are many workshops, demos, announcements about Zynq from DESIGN West.

One of the announcements is from iVeia about the availability of its Android Distribution for Zynq.

The other one is from Adeneo about reference Windows Embedded Compact 7 BSP for Zynq.

ZED – A low-cost Zynq-7020 Evaluation and Development Kit

February 9, 2012

An exciting new Zynq board is coming.

It is a low-cost and community-styled Zynq-7020 board. I was told it will have 5 PMOD headers for evaluation of Avnet’s partner products.

Here’s some links from and avnet:

A website will be setup for the community.